The present invention relates to a semiconductor device fabrication method, more specifically a semiconductor fabrication method which can contribute to the micronization of semiconductor devices.
As a technique of forming element isolation regions defining element regions, LOCOS (LOCal Oxidation of Silicon) is conventionally widely known.
However, when element isolation regions are formed by LOCOS, the element regions tend to be small due to bird's beaks. Making an oxidation amount small when element isolation regions are made can make the bird's beaks small. However, small oxidation amounts make the element isolation function insufficient. When element isolation regions are formed by LOCOS, large steps are formed on the substrate surface. The technique of forming element isolation regions by LOCOS makes it further micronization and higher integration impossible.
Recently, STI (Shallow Trench Isolation) is proposed in place of LOCOS. The method of forming element isolation regions by STI will be explained with reference to FIGS. 6A to 7C. FIGS. 6A to 7C are sectional views of a semiconductor device in the steps of the proposed semiconductor device fabrication method, which show the method.
First, as shown in FIG. 6A, a silicon oxide film 112, a silicon nitride film 1114 and a anti-reflection film 116 are formed sequentially on a semiconductor substrate 110. Then, a photoresist film 120 is formed on the anti-reflection film 118. Next, openings 121 are opened in the photoresist film 120 down to the anti-reflection film 116.
Then, as shown in FIG. 6B, with the photoresist film 120 as the mask, the anti-refection film 118 is etched.
Next, as shown in FIG. 6C, with the photoresist film 120 as the mask, the silicon nitride film 114 is sequentially etched.
Then, as shown in FIG. 7A, the photoresist film 120 is released.
Next, as shown in FIG. 7B, with the silicon nitride film 114 as the mask, the semiconductor substrate 110 is etched to thereby form trenches 122, i.e., grooves.
Then, a silicon oxide film is formed in the trenches 122 and on the silicon nitride film 114. Then, the silicon oxide film 126 is polished by CMP (Chemical Mechanical Polishing) until the silicon nitride film 114 is exposed. Element isolation regions 128 of the silicon oxide film 126 are thus buried in the trenches 122. Thus, element regions 130 are defined by the element isolation regions 128 (refer to FIG. 7C).
Then, the silicon nitride film 114 and the silicon oxide film 112 are removed, and transistors (not shown) are fabricated in the element regions 130. Thus, a semiconductor device is fabricated.
Forming the element isolation regions 128 by STI prohibits the generation of bird's beak which is generated in forming element isolation regions by LOCOS, whereby the decrease of the element regions 130 can be prevented. Making the trenches 122 deeper can make the effective inter-element distance longer, whereby higher element isolation function can be provided.
Following references disclose the background art of the present invention.
[Patent Reference 1]
Specification of Japanese Patent Application Unexamined Publication No. 2000-269192
[Patent Reference 2]
Specification of Japanese Patent Application Unexamined Publication No. 2001-176841
[Patent Reference 3]
Specification of Japanese Patent Application Unexamined Publication No. 2001-44274
However, the proposed semiconductor device fabrication method cannot further micronize semiconductor devices. That is, in order to further micronize semiconductor devices, the photoresist film 120 must be patterned into smaller width. However, when the silicon nitride film 114 is dry etched, using the photoresist film 120 of a narrow width, the photoresist film 120 often collapses. On the other hand, when the photoresist film 120 is formed thin, the photoresist film 120 is prevented from collapsing, but the selectivity of etching the silicon nitride film 114 to the photoresist film 120 is not always high, and while the silicon nitride film 114 is etching, the photoresist film 120 is gradually extinguished. In such case, the shoulders of the silicon nitride film 114 are much scraped, or the side wall of the silicon nitride film 114 is roughened. That is, the silicon nitride film 114 cannot be patterned into a required configuration. The silicon nitride film 114 cannot be patterned into a required pattern, and accordingly the trenches cannot be formed into a required configuration.
Here, setting the film thickness of the silicon nitride film 114 to be small allows the silicon nitride film 114 to be patterned in a shorter period of time and could solve the above-described problems. However, the silicon nitride film 114, which functions as the stopper film for polishing the silicon oxide film 126 by CMP, must be formed in a uniform and sufficient film thickness, when the silicon nitride film 114 is polished. Accordingly, it is not preferable to set the film thickness of the silicon nitride film 114 to be small.